电子工程师超车计划之DDRx仿真实践第三期：超车篇_弯道2-DDRx后仿真实践 - 电巢学堂

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电子工程师超车计划之DDRx仿真实践第三期：超车篇_弯道2-DDRx后仿真实践

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课程介绍

讲师介绍：

胡建伟

亚太区Mentor EDA分销部门应用工程师经理
Mentor PCB仿真分析产品技术支持
EDA行业从业并管理20+年

胡建伟于1999年毕业于东南大学，并获得数字信号处理硕士学位。在高速PCB设计领域拥有丰富的经验和背景，曾任Cadence高级应用工程师，负责支持Cadence PCB设计及仿真工具。

直播介绍：

当今电子产品一个很重要的区分元素是其所用的存储器。服务器、计算机、智能手机、游戏机、GPS 以及几乎所有类似产品使用的都是现代处理器和 FPGA。这些设备需要高速、高带宽、双倍数据速率 (DDR)存储器才能运行。每一代 DDR SDRAM（双倍数据速率同步动态随机存取存储器）都会带来新的优势，例如速度和容量的提升以及功耗的下降。要满足速度提升，功耗降低的要求，就要应对设计余量降低的挑战。
如何应对挑战不重要，重要的是我们要超车，那就跟着我们学DDRx的仿真！

课程特色：

我做：介绍知识背景和我们的练习案例
我们一起做：一两个练习，
你们课后做：研究其他的练习

直播要点：

DDR接口的信号完整性和时序电气规则
“遵循设计指导布线”为何不再完美
为什么JEDEC 规范只能提供验证所需的部分信息
Controller/DRAM 配置对布线规则的影响
HyperLynx 布线后验证助力设计优化

内容花絮：

DDR 接口的正常工作，要求满足不同信号组之间的信号完整性和时序要求。为了减少改版次数，在PCB制造之前，通过验证从而确保设计满足所有要求。传统上，设计师依靠信号完整性专家来进行仿真验证工作，完全芯片厂商提供的PCB设计指导，不进行任何仿真验证工作，希望能够通过物理原型测试发现设计缺陷。不断升高的速率，DDR接口的工作余量越来越小，简单的遵循物理设计规则已经不能满足设计要求。
本次电巢直播将分享DDR设计中电气规则的特殊性，快速进行布线后仿真验证。

适合对象：

在校学生
来串门的同行
想学习的人群
有超车涨薪需求的人群
对仿真感兴趣的电子工程师
对HyperLynx感兴趣的电子工程师

目录

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